Ultra-Low-Voltage IC Design Methods

The emerging nanoscale technologies inherently offer transistors working with low voltage levels and are optimized for low-power operation. However, these technologies lack quality electronic components vital for reliable analog and/or mixed-signal design (e.g., resistor, capacitor, etc.) as they are predominantly used in high-performance digital designs. Moreover, the voltage headroom, ESD properties, the maximum current densities, parasitic effects, process fluctuations, aging effects, and many other parameters are superior in verified-by-time CMOS processes using planar transistors. This is the main reason, why low-voltage, low-power high-performance analog and mixed-signal circuits are still being designed in mature process nodes. In the proposed chapter, we bring an overview of main challenges and design techniques effectively applicable for ultra-low-voltage and low-power analog integrated circuits in nanoscale technologies. New design challenges and limitations linked with a low value of the supply voltage, the process fluctuation, device mismatch, and other effects are discussed. In the later part of the chapter, conventional and unconventional design techniques (bulk-driven approach, floating-gate, dynamic threshold, etc.) to design analog integrated circuits towards ultra-low-voltage systems and applications are described. Examples of ultra-low-voltage analog ICs blocks (an operational amplifier, a voltage comparator, a charge pump, etc.) designed in a standard CMOS technology using the unconventional design approach are presented

Analysis of BDMOS and DTMOS Current Mirrors in 130 nm CMOS Technology

In this paper, an analysis of basic Current Mirror (CM) topologies was performed with a focus on comparison of conventional realization to Bulk-Driven (BD) and Dynamic-Threshold (DT) equivalents, in terms of main properties. These circuits were designed in 130 nm CMOS technology using the supply voltage of 0.6 V and laid out on a test-chip. Fabricated circuits were analyzed and their characteristics compared to the simulation results. The achieved results prove that these unconventional circuit design techniques are quite promising for contemporary ultra low-voltage analog Integrated Circuits (ICs

Digital On-Chip Calibration of Analog Systems towards Enhanced Reliability

This chapter deals with digital method of calibration for analog integrated circuits as a means of extending its lifetime and reliability, which consequently affects the reliability the analog electronic system as a whole. The proposed method can compensate for drift in circuit’s electrical parameters, which occurs either in a long term due to aging and electrical stress or it is rather more acute, being caused by process, voltage and temperature variations. The chapter reveals the implementation of ultra-low voltage on-chip system of digitally calibrated variable-gain amplifier (VGA), fabricated in CMOS 130 nm technology. It operates reliably under supply voltage of 600mV with 10% variation, in temperature range from −20°C to 85°C. Simulations suggest that the system will preserve its parameters for at least 10 years of operation. Experimental verification over 10 packaged integrated circuit (IC) samples shows the input offset voltage of VGA is suppressed in range of 13μV to 167μV. With calibration the VGA closely meets its nominally designed essential specifications as voltage gain or bandwidth. Digital calibration is comprehensively compared to its widely used alternative, Chopper stabilization through its implementation for the same VGA

New Generation of Very Low Noise Beam Position Measurement System for the LHC Transverse Feedback

Recent studies showed that the transverse feedback system noise floor in the Large Hadron Collider (LHC) must be reduced by at least factor of two in order to operate the machine with large beam-beam tune shift as foreseen in the High Luminosity (HL) LHC. Also, the future feedback system foreseen to suppress the LHC Crab Cavity noise relies on improved noise performance of the beam position measurement system. An upgrade program was launched to lower the LHC transverse feedback system noise floor during the LHC Long Shutdown II. A new generation, very low noise beam position measurement module was developed and tested with beam. Innovative methods in the RF receiver, digital signal processing, thorough optimization of every element in the signal chain from pickup to the kickers allowed to achieve a significant reduction of the system noise floor. This unprecedented noise performance opens also new possibilities for auxiliary instruments, using the position data from the transverse feedback. The paper presents the new system, notable implementation details and measured performance

130 nm CMOS Fully Differential SC Filter for Ultra-Low Voltage ∑-Δ Converter

In this paper design and function of thefully differential (FD) switched-capacitor (SC) integra-tor for ultra-low voltage Sigma-Delta analog to digitalconverter (Σ-∆ADC) are presented. The proposedintegrator was designed for differential input signal andapplicable as a main analog block of ultra-low voltageΣ-∆ADC in standard 130 nm CMOS technology.The main block of proposed integrator is operationaltransconductance amplifier (OTA) based on two-stageRail-to-Rail (RtR) FD operational amplifier (OPAMP)working in sub-threshold regime. The characteristicproperties of this circuit is non-standard OTA topology,using SC common-mode feedback (CMFB) circuit andusing switching T-gates. All of these subcircuits aresupplied by only 0.6 V with achieved gain 24.09 dB andcutoff frequency 165.95 kHz

Chapter Digital On-Chip Calibration of Analog Systems towards Enhanced Reliability

This chapter deals with digital method of calibration for analog integrated circuits as a means of extending its lifetime and reliability, which consequently affects the reliability the analog electronic system as a whole. The proposed method can compensate for drift in circuit’s electrical parameters, which occurs either in a long term due to aging and electrical stress or it is rather more acute, being caused by process, voltage and temperature variations. The chapter reveals the implementation of ultra-low voltage on-chip system of digitally calibrated variable-gain amplifier (VGA), fabricated in CMOS 130 nm technology. It operates reliably under supply voltage of 600 mV with 10% variation, in temperature range from − 20 ° C to 85 ° C . Simulations suggest that the system will preserve its parameters for at least 10 years of operation. Experimental verification over 10 packaged integrated circuit (IC) samples shows the input offset voltage of VGA is suppressed in range of 13 μV to 167 μV . With calibration the VGA closely meets its nominally designed essential specifications as voltage gain or bandwidth. Digital calibration is comprehensively compared to its widely used alternative, Chopper stabilization through its implementation for the same VGA

Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology

This paper presents design of a Maximum Power Point Tracking (MPPT) circuit and its functionality for tuning the maximum power transfer from an energy harvester (EH) unit. Simple and practical “Perturb and Observe” (P&O) algorithm is investigated and implemented. We describe the circuit functionality and the improvements that have been introduced to the original algorithm. The proposed MPPT design is divided into three main blocks. The output signal is being generated by the PWM or PFM block. The tracking speed has been enhanced by implementing a variable step size in the “Tracking Block”. Finally, the overall power consumption of the MPPT circuit itself is controlled by the “Power Management Block”, which manages delivering the clock signal to the rest of the circuit. The RTL code of the proposed MPPT has been created in Verilog, synthesized and placed-and-routed in a general purpose 130 nm CMOS technology

Reconstruction of Transverse Phase Space From Transverse Feedback Data for Real Time Extraction of Vital LHC Machine Parameters

The LHC transverse feedback system (ADT) provides bunch by bunch, turn by turn, normalized and digitized beam position signals from four pick-ups per plane and for each beam. Together with already existing powerful computer-based observation systems, this data can be used to reconstruct in real-time the transverse phase space coordinates of the centre-of-charges, for each individual bunch. Such information is extremely valuable for machine operation, or transverse instability diagnostics. This paper aims on discussing and evaluating methods of combining four position signals for such analysis in the presence of noise and with active transverse feedback. Comparisons are made based on the extraction of vital parameters like the fractional tune or transverse activity. Analytical and numerical results are further benchmarked against real beam data

0.3-V, 357.4-nW Voltage-Mode First-Order Analog Filter Using a Multiple-Input VDDDA

In this paper, a new versatile first-order voltage-mode analog filter using a single multiple-input voltage differencing differential difference amplifier for extremely low-voltage supply and low-frequency applications is presented. Using multiple-input MOS transistor technique, the filter can realize the first-order transfer functions of non-inverting and inverting low-pass, high-pass, and all-pass filters in a single topology with high input and low output impedance. This is particularly useful for voltage-mode circuits. The filter’s pole frequency can be controlled electronically. The filter was used to implement a new quadrature oscillator to confirm its advantages. The multiple-input was applied to bulk-driven differential pairs operating in weak inversion; therefore, the proposed circuit operated from a supply voltage of 0.3 V and consumed 357.4 nW. The circuit was designed in the Cadence program using $0.13~\mu \text{m}$ UMC CMOS technology. The performance and robustness of the design was validated by intensive simulations, including Monte Carlo and Process, Voltage and Temperature corner analyses